Experience
Experience
PhD Student @UCSD
09/2023 - Present
Senior ASIC Design Verification Engineer @NVIDIA
08/2021 - 09/2023
Senior ASIC Design Verification Engineer @NVIDIA
- GPU L2 Cache Team
- Develop test and testbench code in C++, Perl, and Python, in a verification codebase for GPU cache IP.
- Own and build C++ model for cache coherency protocol with thousands of lines of object-oriented code and many stakeholders which regularly identifies bugs in L2 RTL and architectural model implementations.
- Meet and correspond with RTL designers and GPU architects to understand features and interfaces and to discuss implementation bugs.
Silicon Design Engineer 2 @AMD
01/2020 - 08/2021
Silicon Design Engineer 2 @AMD
- CPU Cores Team - Decode Unit
- Built on a specialized C++ testbench to verify complex x86 CISC decode unit for high performance multiprocessors.
- Developed and owned verification code for Immediate, Data, and RIP interface that covered entire x86 instruction space, as well as touching on code for multiple other features.
- Wrote and understood x86 instructions/testcases for debug and debugged by analyzing waveforms in a massive RTL codebase.
Design Engineer 2 @Texas Instruments
01/2020 - 08/2021
Design Engineer 2 @Texas Instruments
- FPD-Link Team
- Wrote code in object-oriented multi-threaded SystemVerilog verification environment in tandem with design updates for new features, identifying and locating RTL bugs and logic errors in the design or testbench, running regressions, for SerDes chipset.
- Verified various standard communications protocols such as I2C, SPI, CSI-2(D/C-PHY) at a low level.
Graduate TA, Analog Electronics Lab @Georgia Tech
01/2019 - 05/2019
Graduate TA, Analog Electronics Lab @Georgia Tech
- Led students through a series of weekly laboratory experiments & graded assignments.
Graduate TA, High Performance Computer Architecture @Georgia Tech
08/2018 - 12/2018:
Graduate TA, High Performance Computer Architecture @Georgia Tech
- held office hours to help students learn concepts, answered online questions to assist graduate students with course concepts and projects in the form of large-scale C++ simulations, and graded exams.
Research for Credit, Application Aware Computing Lab @Georgia Tech
08/2018 - 12/2018
Research for Credit, Application Aware Computing Lab @Georgia Tech
- Worked with a graduate student to run reinforcement learning (Q-Learning) experiments to train a CPU in a robot to tune parameters such as frequency as it traversed a maze using A*.
Engineering Intern, Autonomy & Sites @Caterpillar
05/2017 - 08/2017
Engineering Intern, Autonomy & Sites @Caterpillar
- Developed on NVIDIA Jetson TX2, creating ROS packages in C++ to interface sensors and cameras, while also developing microcon-troller code in C & C++ using common protocols like I2C and Serial to collect data to classify concrete with Machine Learning.
Research for Credit, Low Frequency Radio Group @Georgia Tech
08/2016 - 12/2016
Research for Credit, Low Frequency Radio Group @Georgia Tech
- Used MATLAB to analyze and visualize data in attempt to find precursors to earthquakes in sub-ionospheric VLF signals.
Engineering Intern @GE Transportation
01/2016 - 04/2016